Energy efficiency is the most significant challenge standing in the way of continued miniaturization of electronic systems, and miniaturization is the principal driver of the semiconductor industry. “As we approach the ultimate limits of Moore’s Law , however, silicon will have to be replaced in order to miniaturize further,” said Jeffrey Bokor, deputy director for science at the Molecular Foundry at the Lawrence Berkeley National Laboratory and Professor at UC-Berkeley.
A team of Stanford engineering professors, doctoral students, undergraduates, and high-school interns, led by Professors Subhasish Mitra and H.-S. Philip Wong , took on the challenge and has produced a series of breakthroughs that represent the most advanced computing and storage elements yet created. Since nanotube transistors were demonstrated in 1998, researchers imagined a new age of highly efficient, advanced computing electronics. That promise, however, is yet to be realized due to substantial material imperfections inherent to nanotubes that left engineers wondering whether CNTs would ever prove viable. The Stanford design approach has two striking features in that it sacrifices virtually none of CNTs’ energy efficiency and it is also compatible with existing fabrication methods and infrastructure, pushing the technology a significant step toward commercialization. “The first CNTs wowed the research community with their exceptional electrical, thermal and mechanical properties over a decade ago, but this recent work at Stanford has provided the first glimpse of their viability to complement silicon CMOS transistors,” said Larry Pileggi, Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University..